#ifndef __RK3288_REG_RGA_H__
#define __RK3288_REG_RGA_H__

#define RK3288_RGA_BASE		(0xff920000)

#define RGA_SYS_CTRL		(0x0000)
#define RGA_CMD_CTRL		(0x0004)
#define RGA_CMD_BASE		(0x0008)
#define RGA_STATUS			(0x000c)
#define RGA_INT				(0x0010)
#define RGA_MMU_CTRL0		(0x0014)
#define RGA_MMU_CMD_BASE	(0x0018)
#define RGA_MODE_CMD_CTRL	(0x0100)
#define RGA_SRC_INFO		(0x0104)
#define RGA_SRC_BASE0		(0x0108)
#define RGA_SRC_BASE1		(0x010c)
#define RGA_SRC_BASE2		(0x0110)
#define RGA_SRC_BASE3		(0x0114)
#define RGA_SRC_VIR_INFO	(0x0118)
#define RGA_SRC_ACT_INFO	(0x011c)
#define RGA_SRC_X_FACTOR	(0x0120)
#define RGA_SRC_Y_FACTOR	(0x0124)
#define RGA_SRC_BG_COLOR	(0x0128)
#define RGA_SRC_FG_COLOR	(0x012c)
#define RGA_CP_GR_A			(0x0130)
#define RGA_SRC_TR_COLOR0	(0x0130)
#define RGA_CP_GR_B			(0x0134)
#define RGA_SRC_TR_COLOR1	(0x0134)
#define RGA_DST_INFO		(0x0138)
#define RGA_DST_BASE0		(0x013c)
#define RGA_DST_BASE1		(0x0140)
#define RGA_DST_BASE2		(0x0144)
#define RGA_DST_VIR_INFO	(0x0148)
#define RGA_DST_ACT_INFO	(0x014c)
#define RGA_ALPHA_CTRL0		(0x0150)
#define RGA_ALPHA__CTRL1	(0x0154)
#define RGA_FADING_CTRL		(0x0158)
#define RGA_PAT_CON			(0x015c)
#define RGA_CP_GR_G			(0x0160)
#define RGA_ROP_CON0		(0x0160)
#define RGA_CP_GR_R			(0x0164)
#define RGA_ROP_CON1		(0x0164)
#define RGA_MASK_BASE		(0x0168)
#define RGA_MMU_CTRL1		(0x016c)
#define RGA_MMU_SRC_BASE	(0x0170)
#define RGA_MMU_SRC1_BASE	(0x0174)
#define RGA_MMU_DST_BASE	(0x0178)
#define RGA_MMU_ELS_BASE	(0x017c)

#endif /* __RK3288_REG_RGA_H__ */
